Faulttolerance techniques for srambased fpgas frontiers in electronic testing book. In the proposed application, the operands are shifted by 1 bit. Srambased field programmable gate arrays fpgas are programmable devices used for different applications, such as signal processing, prototyping and networking. It starts by showing the model of the problem and the upset effects in the programmable architecture. Section 5 introduces a new highlevel technique for designing faulttolerant systems for srambased. Designing fault tolerant systems into srambased fpgas. A novel design flow for fault tolerance srambased fpga. Designing and testing faulttolerant techniques for sram. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. Pdf designing fault tolerant systems into srambased fpgas. Many ft techniques use hardware redundancy in order to reduce the probability of failure. This book discusses faulttolerance techniques for srambased field programmable gate arrays fpgas. Faulttolerance techniques for srambased fpgas request pdf.
Fpgas, without modifications in the fpga architecture, able. During runtime, failure masking techniques can be used to tolerate failures. In 9, highlevel techniques for designing fault tolerance systems in srambased fpgas, without modification in the fpga architecture, are described. At the second computation, the operands are shifted k bits to the left, computed and the result is shifted k bits to the right 2k bits, if a multiplier or divider. Designing and testing faulttolerant techniques for srambased. Request pdf faulttolerance techniques for srambased fpgas faulttolerance in integrated circuits is no longer the exclusive concern of space designers or highlyreliable applications engineers.
Pdf designing faulttolerant techniques for srambased fpgas. A novel design flow for fault tolerance srambased fpga systems. Soft error rate estimation and mitigation for srambased fpgas. Fis, a bitstream download can be affected by radiation effects, potentially. Faulttolerance techniques for srambased fpgas frontiers in. Manuscripts should not exceed 5,000 words with each averagesize figure. Thus, in the first computation, the operands are computed and stored in a register.
Several ft techniques have been proposed and tested for mitigating seus in srambased fpgas 6. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated. Designing faulttolerant techniques for srambased fpgas. Lets take for example t he srambased fpgas such as the virtex family f rom xilinx that is one of the m ost popular programmable devices used in the market no wadays. Faulttolerance techniques for srambased fpgas springer. Semantic scholar extracted view of faulttolerance techniques for sram based fpgas by ricardo p.